{"title":"Improving Input Circuits for 7-bit Flash AD Converter","authors":"M. Sokol, P. Galajda, M. Pecovský","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092400","DOIUrl":null,"url":null,"abstract":"The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 µm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092400","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 µm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.
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