Thermal management of on-chip hot spots and 3D chip stacks

Abstract

The rapid increase in on-chip heat fluxes and package heat density, accompanying the migration to nanoelectronics and 3D chip stacks, has placed thermal management squarely on the critical path for advanced product development. Innovative, cost-effective cooling techniques, combined in a synergetic way with more conventional approaches, must be developed if the benefits of the Moore's Law progression are to be realized. Following a brief discussion of the industry roadmap for IC packaging and review of chip package thermal management options, attention will turn to the application of solidstate thermoelectric refrigeration and the thermal characteristics of direct immersion cooling in dielectric liquids. The presentation will close with a discussion of the research challenges associated with the commercial implementation of on-chip thermoelectric coolers and direct liquid cooling.