A 1.1-V 40-nm CMOS High Linearity Voltage Follower with Improved CM Input Range

Tianyu Liu, Chunfeng Bai
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Abstract

This paper presents a novel voltage follower, which is implemented in a 40nm CMOS process and under a supply of 1.1-V. In order to adapt to limited headroom, a low-threshold PMOS is used as the input transistor, and a novel low-voltage current source is proposed. Hence, high linearity and improved common-mode input range is obtained. The OIP3 reaches 28.7 dBm, and the common-mode input range is 0∼790 mV.
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改进CM输入范围的1.1 v 40纳米CMOS高线性电压跟随器
本文提出了一种新颖的电压跟随器,采用40nm CMOS工艺,在1.1 v电源下实现。为了适应有限的净空,采用低阈值PMOS作为输入晶体管,提出了一种新型的低压电流源。因此,获得了高线性度和改进的共模输入范围。OIP3达到28.7 dBm,共模输入范围为0 ~ 790 mV。
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