Fault-Tolerant Deadlock-Free Adaptive Routing for Any Set of Link and Node Failures in Multi-cores Systems

Fabien Chaix, D. Avresky, N. Zergainoh, M. Nicolaidis
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引用次数: 39

Abstract

Future applications will require processors with many cores communicating through a regular interconnection network. Meanwhile, as the Deep submicron technology fore- shadows highly defective chips era, fault-tolerant designs become compulsory. In particular, the fault tolerance of a core interconnect is critical, and inevitably increases its complexity. In this paper, we present a novel adaptive routing algorithm that is able to route messages in the presence of any set of multiple nodes and links failures, as long as a path exists. Compared to the existing solutions, the proposed algorithm provides fault tolerance without using any routing table. It is scalable and can be applied to multicore chips with a 2D mesh core interconnect of any size. The algorithm is deadlock-free and avoids infinite looping in fault-free and faulty 2D meshes, based on Virtual Networks and Virtual Channels. We simulated the proposed algorithm using the worst case scenario, regarding the traffic patterns and the failure rate up to 40%. Experimentation results confirmed that the algorithm tolerates multiple failures even in the most extreme failure patterns. Additionally, we monitored the trade off between the fault tolerance and the average latency for faulty cases, as measurement of the performance degradation. The algorithm detects the interconnects partitioning and enables "preferred paths" for streaming applications.
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多核系统中任意链路和节点故障的容错无死锁自适应路由
未来的应用将需要多核处理器通过常规互连网络进行通信。同时,随着深亚微米技术在高缺陷芯片时代的来临,容错设计变得必不可少。其中,核心互连的容错性至关重要,不可避免地增加了其复杂性。在本文中,我们提出了一种新的自适应路由算法,只要存在路径,它就能够在存在任何多节点和链路故障的情况下路由消息。与现有算法相比,该算法在不使用路由表的情况下具有容错性。它是可扩展的,可以应用于任何尺寸的二维网格核心互连的多核芯片。该算法基于虚拟网络和虚拟通道,无死锁,避免了无故障和故障二维网格中的无限循环。我们使用最坏的情况来模拟所提出的算法,考虑到流量模式和高达40%的故障率。实验结果表明,即使在最极端的故障模式下,该算法也能容忍多次故障。此外,我们还监视了故障情况下容错性和平均延迟之间的权衡,作为性能下降的度量。该算法检测互连分区,并为流应用程序启用“首选路径”。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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