Implementation of ANN on RISC processor array

A. Hiraiwa, M. Fujita, S. Kurosu, S. Arisawa, M. Inoue
{"title":"Implementation of ANN on RISC processor array","authors":"A. Hiraiwa, M. Fujita, S. Kurosu, S. Arisawa, M. Inoue","doi":"10.1109/ASAP.1990.145502","DOIUrl":null,"url":null,"abstract":"The authors present a mesh systolic array, GCN (giga connection), for a fast simulator of artificial neural networks (ANNs). The processor element (PE) of the GCN is composed of the RISC processor i-860 designed by Intel Corp., a large scale local memory, and high bandwidth first-in first-out devices. The mapping algorithm of the ANN onto the GCN, called the net-data partition, is discussed, and the multilayer feedforward network and Kohenen feature map are mapped onto the GCN by using this algorithm. Another parallelism that can be used for a stochastic ANN like the Boltzmann machine is also discussed. The performance of the GCN is evaluated by software simulation and the authors achieve over 1 gigaconnection per second using 128 PEs.<<ETX>>","PeriodicalId":438078,"journal":{"name":"[1990] Proceedings of the International Conference on Application Specific Array Processors","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1990] Proceedings of the International Conference on Application Specific Array Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.1990.145502","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

The authors present a mesh systolic array, GCN (giga connection), for a fast simulator of artificial neural networks (ANNs). The processor element (PE) of the GCN is composed of the RISC processor i-860 designed by Intel Corp., a large scale local memory, and high bandwidth first-in first-out devices. The mapping algorithm of the ANN onto the GCN, called the net-data partition, is discussed, and the multilayer feedforward network and Kohenen feature map are mapped onto the GCN by using this algorithm. Another parallelism that can be used for a stochastic ANN like the Boltzmann machine is also discussed. The performance of the GCN is evaluated by software simulation and the authors achieve over 1 gigaconnection per second using 128 PEs.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
人工神经网络在RISC处理器阵列上的实现
作者提出了一种网格收缩阵列,GCN(千兆连接),用于人工神经网络(ann)的快速模拟器。GCN的处理器单元(PE)由Intel公司设计的RISC处理器i-860、大规模本地存储器和高带宽先进先出器件组成。讨论了神经网络到GCN的映射算法,即网络-数据分区,并利用该算法将多层前馈网络和Kohenen特征映射映射到GCN上。另一种可用于随机人工神经网络的并行性,如玻尔兹曼机,也进行了讨论。通过软件仿真对GCN的性能进行了评估,作者使用128 pe .>实现了每秒超过1千兆的连接
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Design of run-time fault-tolerant arrays of self-checking processing elements Domain flow and streaming architectures A fault-tolerant two-dimensional sorting network Algorithmic mapping of neural network models onto parallel SIMD machines The bit-serial systolic back-projection engine (BSSBPE)
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1