{"title":"Physical layer architecture for 1-wire sensor communication bus: Binary channel Code Division Multiple Access","authors":"Benjamin Peiffer, A. Kruger","doi":"10.1109/SAS.2011.5739794","DOIUrl":null,"url":null,"abstract":"Researchers at The University of Iowa have encountered the need for an efficient 1-wire communication protocol for use in embedded systems and distributed wired sensors. One possible solution for this problem is the use of a Wired Code Division Multiple Access (CDMA). Although this approach has been investigated before, a key simplification can made with the use of a binary wired-OR channel. This paper develops the theory for such a protocol, including a mathematical formulation of the Bit Error Rate, and describes experiments that are being conducted to determine the validity of this approach, including a software simulation to calculate expected Bit Error Rate and prototype hardware to verify the practicality of this design.","PeriodicalId":401849,"journal":{"name":"2011 IEEE Sensors Applications Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Sensors Applications Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SAS.2011.5739794","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Researchers at The University of Iowa have encountered the need for an efficient 1-wire communication protocol for use in embedded systems and distributed wired sensors. One possible solution for this problem is the use of a Wired Code Division Multiple Access (CDMA). Although this approach has been investigated before, a key simplification can made with the use of a binary wired-OR channel. This paper develops the theory for such a protocol, including a mathematical formulation of the Bit Error Rate, and describes experiments that are being conducted to determine the validity of this approach, including a software simulation to calculate expected Bit Error Rate and prototype hardware to verify the practicality of this design.