mm-Wave and THz multipliers: Advances and opportunities

Abstract

This paper introduces a new way of evaluating performance of mm-wave integrated multiplier chains based on the power efficiency. Although superior performance of III–V technologies are acknowledged, focus of the paper will be on Silicon circuits which are more suited for large-scale multi-element integrated arrays. It will be discussed that power efficiency of the multiplier chain including the dc power required for generating the input RF signal is a very important metric for selecting the topology and configuration of the system. We will demonstrate that proper choice of topology as well as optimized circuit design yield state-of-the art output power at 260GHz–280GHz in SiGe and CMOS circuits.