{"title":"A System for Fast Text-to-Braille Translation Based on FPGAs","authors":"Xuan Zhang, C. Ortega-Sanchez, L. Murray","doi":"10.1109/SPL.2007.371735","DOIUrl":null,"url":null,"abstract":"This paper describes a fast text to braille translator based on field programmable gate arrays (FPGAs). Compared with most commercial methods, this translator is able to carry out the translation in hardware instead of using software. To achieve the fast translation, a FPGA with big programmable resource has been utilized, and an algorithm, proposed by Paul Blenkhorn, has been revised to perform the fast translation. The translator has been described using very high speed integrated circuit hardware description language (VHDL). The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, and moreover, this system achieves superior throughput compared to Blenkhorn's original algorithm.","PeriodicalId":419253,"journal":{"name":"2007 3rd Southern Conference on Programmable Logic","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 3rd Southern Conference on Programmable Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2007.371735","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper describes a fast text to braille translator based on field programmable gate arrays (FPGAs). Compared with most commercial methods, this translator is able to carry out the translation in hardware instead of using software. To achieve the fast translation, a FPGA with big programmable resource has been utilized, and an algorithm, proposed by Paul Blenkhorn, has been revised to perform the fast translation. The translator has been described using very high speed integrated circuit hardware description language (VHDL). The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, and moreover, this system achieves superior throughput compared to Blenkhorn's original algorithm.