Common-Mode Voltage Reduction and Elimination in a Space Vector Modulated Three-Phase Five-Level Multistring Inverter

Abstract

Methods of direct space vector modulation (SVM) schemes for reduction and complete elimination of common-mode voltage in a three-phase five-level multistring inverter are presented. Unlike Cascaded-H bridge multilevel inverters, switching cells of multistring inverters share the middle leg power semiconductors, which switch at or about the line frequency, for reduced number of switching devices. Therefore, the sequence of turn on and turn off is carefully selected by fulfilling Kirchhoff’s voltage law to avoid short circuiting the voltage sources. In the reduced common-mode voltage scheme, a method of decomposing the reference voltage vectors to the switching functions and times with zero and Vdc/3 common-mode voltages is developed. Furthermore, a technique of complete common-mode voltage elimination is proposed. Results and discussion for both SVM schemes are presented.