{"title":"Multirate FIR Filter Using Radix Sort Booth Algorithm In Xilinx System Generator","authors":"Zulfiqar Ali, Sania Syed, Syed Tahir Hussain Shah, Wesam Khalil, Muhammad Ayaz","doi":"10.1109/ICETECC56662.2022.10069905","DOIUrl":null,"url":null,"abstract":"Multirate Finite Impulse response (FIR) filters are extensively utilised in digital signal processing in which different filter parts operate at different rates. It has applications in communication transmitters and receivers. Multirate FIR filters when implemented use multipliers and accumulators. There are various types of multiplier structure algorithms and their variations such as Combinational multiplier, Wallace Tree multiplier, Array multiplier and Sequential multiplier and Booth multiplier. Booth multipliers reduces the resulting number of partial products generated as a result of multiplication of two binary numbers. Mutlirate FIR filter has been implemented using with radix-2, 4, 8, 16 and 32 booth recoding algorithm. Multirate 23-tap FIR filter has been implemented using Xilinx System Generator 14.7 which is compatible with MATLAB 2013b. Booth multipliers using different radix sort has been done using Verilog in Xilinx 14.7 and then the synthesized code is imported to Xilinx system generator (MATLAB). The concept of booth multipliers has been incorporated with Radix-4 based booth encoding multiplier performing better compared to other radices in terms of Slices, LUTs, DSP48, IOBs utilization and an Error reduction of about 0.00197%.","PeriodicalId":364463,"journal":{"name":"2022 International Conference on Emerging Technologies in Electronics, Computing and Communication (ICETECC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Emerging Technologies in Electronics, Computing and Communication (ICETECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETECC56662.2022.10069905","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Multirate Finite Impulse response (FIR) filters are extensively utilised in digital signal processing in which different filter parts operate at different rates. It has applications in communication transmitters and receivers. Multirate FIR filters when implemented use multipliers and accumulators. There are various types of multiplier structure algorithms and their variations such as Combinational multiplier, Wallace Tree multiplier, Array multiplier and Sequential multiplier and Booth multiplier. Booth multipliers reduces the resulting number of partial products generated as a result of multiplication of two binary numbers. Mutlirate FIR filter has been implemented using with radix-2, 4, 8, 16 and 32 booth recoding algorithm. Multirate 23-tap FIR filter has been implemented using Xilinx System Generator 14.7 which is compatible with MATLAB 2013b. Booth multipliers using different radix sort has been done using Verilog in Xilinx 14.7 and then the synthesized code is imported to Xilinx system generator (MATLAB). The concept of booth multipliers has been incorporated with Radix-4 based booth encoding multiplier performing better compared to other radices in terms of Slices, LUTs, DSP48, IOBs utilization and an Error reduction of about 0.00197%.