{"title":"The fault tolerance approach of the Advanced Architecture Onboard Processor","authors":"M. Iacoponi, D. Vail","doi":"10.1109/FTCS.1989.105535","DOIUrl":null,"url":null,"abstract":"The Advanced Architecture Onboard Processor is a fault-tolerant multiprocessor for space applications that is based on a fault-tolerant chordal skip-link ring interconnect network. Low-power self-checking circuits in each processor node are combined with distributed reconfiguration control and local rollback recovery to achieve robust fault tolerance within spacecraft weight and power constraints. A ten-processor-node breadboard has been completed. The approach to fault tolerance and the tradeoff analysis leading to the selected implementation are covered. Analytical trade study results such as redundancy overhead as a function of system partitioning for the chordal skip-link ring are discussed.<<ETX>>","PeriodicalId":230363,"journal":{"name":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FTCS.1989.105535","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
The Advanced Architecture Onboard Processor is a fault-tolerant multiprocessor for space applications that is based on a fault-tolerant chordal skip-link ring interconnect network. Low-power self-checking circuits in each processor node are combined with distributed reconfiguration control and local rollback recovery to achieve robust fault tolerance within spacecraft weight and power constraints. A ten-processor-node breadboard has been completed. The approach to fault tolerance and the tradeoff analysis leading to the selected implementation are covered. Analytical trade study results such as redundancy overhead as a function of system partitioning for the chordal skip-link ring are discussed.<>