HAPI: An Event-Driven Simulator for Real-Time Multiprocessor Systems

P. Kurtin, J. Hausmans, M. Bekooij
{"title":"HAPI: An Event-Driven Simulator for Real-Time Multiprocessor Systems","authors":"P. Kurtin, J. Hausmans, M. Bekooij","doi":"10.1145/2906363.2906381","DOIUrl":null,"url":null,"abstract":"Many embedded multiprocessor systems have hard real-time requirements which should be guaranteed at design time by means of analytical techniques that cover all cases. It is desirable to evaluate the correctness and tightness of the analysis results by means of simulation. However, verification of the analytically obtained results is hampered by the lack of a fast high level simulation approach that supports task scheduling and that does not produce pessimistic simulation traces. In this paper we present HAPI, an event driven simulator for the evaluation of the results of real-time analysis techniques for task graphs executed on multiprocessor systems that support processor sharing. HAPI produces simulation traces that are pessimistic to reality and optimistic to temporal analysis. It can be consequently used to detect optimistic, i.e. incorrect, analysis results. Several task scheduling policies are supported by HAPI such as fixed priority preemptive, time-division multiplex and round-robin. Preemptive task scheduling decisions are simulated which enables to study the cause of delayed task finishes and thereby helps to identify overly pessimistic analysis results. We demonstrate the applicability of the simulator using a number of didactic examples and a WLAN 802.11p application.","PeriodicalId":344390,"journal":{"name":"Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2906363.2906381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Many embedded multiprocessor systems have hard real-time requirements which should be guaranteed at design time by means of analytical techniques that cover all cases. It is desirable to evaluate the correctness and tightness of the analysis results by means of simulation. However, verification of the analytically obtained results is hampered by the lack of a fast high level simulation approach that supports task scheduling and that does not produce pessimistic simulation traces. In this paper we present HAPI, an event driven simulator for the evaluation of the results of real-time analysis techniques for task graphs executed on multiprocessor systems that support processor sharing. HAPI produces simulation traces that are pessimistic to reality and optimistic to temporal analysis. It can be consequently used to detect optimistic, i.e. incorrect, analysis results. Several task scheduling policies are supported by HAPI such as fixed priority preemptive, time-division multiplex and round-robin. Preemptive task scheduling decisions are simulated which enables to study the cause of delayed task finishes and thereby helps to identify overly pessimistic analysis results. We demonstrate the applicability of the simulator using a number of didactic examples and a WLAN 802.11p application.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
HAPI:用于实时多处理器系统的事件驱动模拟器
许多嵌入式多处理器系统具有硬实时性要求,必须在设计时通过涵盖所有情况的分析技术来保证。需要通过仿真来评价分析结果的正确性和严密性。然而,由于缺乏一种支持任务调度且不会产生悲观模拟痕迹的快速高级仿真方法,对解析得到的结果的验证受到阻碍。在本文中,我们提出HAPI,一个事件驱动的模拟器,用于评估在支持处理器共享的多处理器系统上执行的任务图的实时分析技术的结果。HAPI产生的模拟轨迹对现实是悲观的,对时间分析是乐观的。因此,它可以用来检测乐观的,即不正确的分析结果。HAPI支持固定优先级抢占、分时复用和轮循等任务调度策略。模拟了抢占式任务调度决策,研究了任务延迟完成的原因,从而有助于识别过于悲观的分析结果。我们使用许多说教性示例和WLAN 802.11p应用程序来演示模拟器的适用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Design Framework for Mapping Vectorized Synchronous Dataflow Graphs onto CPU-GPU Platforms Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors CSDFa: A Model for Exploiting the Trade-Off between Data and Pipeline Parallelism Cache-Aware Instruction SPM Allocation for Hard Real-Time Systems Exploring Single Source Shortest Path Parallelization on Shared Memory Accelerators
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1