Impact of ULK Dielectric Loss on Interconnect Response for 45 nm Node Integrated Circuits

Abstract

New materials such as dielectrics with ultra low permittivity are required to improve interconnect performance for future IC's technology nodes. Porous dielectric materials, as SiOCH, used for the 45 nm technology are very prone to damage during integration process, degrading their permittivity and severely increasing their loss tangent. Theses dielectric losses have to be precisely taken into account in order to accurately simulate the propagation effects along interconnects and to predict delay and crosstalk. Thus fine large-band extraction of complex permittivity must be achieved in respect to physical consistence of signals. This study aims at accurately evaluate the impact of dielectric degradation on interconnects electrical performance. Moreover it will be outlined, using two different IC's configurations, that the accurately on the prediction of interconnect performance needs adequate dielectric models.