{"title":"Power-aware microarchitectures: Design, modeling and metrics","authors":"P. Bose","doi":"10.1109/HOTCHIPS.2005.7476570","DOIUrl":null,"url":null,"abstract":"Presents a collection of slides covering the following: power breakdown data; power-performance efficiency metrics; and hierarchical power modeling (levels of abstraction).","PeriodicalId":357616,"journal":{"name":"2005 IEEE Hot Chips XVII Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Hot Chips XVII Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2005.7476570","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Presents a collection of slides covering the following: power breakdown data; power-performance efficiency metrics; and hierarchical power modeling (levels of abstraction).
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