Universal Numerical Encoder and Profiler Reduces Computing's Memory Wall with Software, FPGA, and SoC Implementations

Al Wegener
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引用次数: 4

Abstract

Summary form only given. Numerical computations have accelerated significantly since 2005 thanks to two complementary, silicon-enabled trends: multi-core processing and single instruction, multiple data (SIMD) accelerators. Unfortunately, due to fundamental limitations of physics, these two trends could not be accompanied by a corresponding increase in memory, storage, and I/O bandwidth. High-performance computing (HPC) is the proverbial “canary in the coal mine” of multi-core processing. When HPC hits a multi-core will likely encounter a similar limit in few years. We describe the computationally efficient (Fig 1b) and adaptive APplication AXceleration (APAX) numerical encoding method to reduce the memory wall for integers and floating-point operands. APAX achieves encoding rates between 3:1 and 10:1 without changing the dataset's statistical or spectral characteristics. APAX encoding takes advantage of three characteristics of all numerical sequences: peak-to-average ratio, oversampling, and effective number of bits (ENOB). Uncertainty quantification and spectral methods quantify the degree of uncertainty (accuracy) in numerical datasets. APAX profiler creates a rate-correlation graph with recommended operating signals, and fundamental limit, consumer point, provides 18 quantitative metrics comparing the original and decoded displays input and residual spectra with a residual histogram. On 24 integer and floating-point HPC datasets taken from climate, multi-physics, and seismic simulations, APAX averaged 7.95:1 encoding ratio at a Pearson's correlation coefficient of 0. 999948, and a spectral margin (input spectrum min - residual spectrum mean) of 24 dB. HPC scientists confirmed that APAX did not change HPC simulation results DRAM and disk transfers by 8x, accelerating HPC “time to results” by 20% while reducing to 50%.
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通用数字编码器和分析器通过软件、FPGA和SoC实现减少计算的内存墙
只提供摘要形式。自2005年以来,由于两种互补的硅驱动趋势:多核处理和单指令多数据(SIMD)加速器,数值计算显著加速。不幸的是,由于物理的基本限制,这两种趋势不能伴随着内存、存储和I/O带宽的相应增加。高性能计算(HPC)是多核处理中众所周知的“煤矿里的金丝雀”。当高性能计算进入多核时,可能会在几年内遇到类似的限制。我们描述了计算效率高(图1b)和自适应应用加速(APAX)的数字编码方法,以减少整数和浮点操作数的内存墙。APAX在不改变数据集的统计或光谱特征的情况下实现3:1到10:1之间的编码率。APAX编码利用了所有数字序列的三个特征:峰均比、过采样和有效位数(ENOB)。不确定度量化和光谱方法量化数值数据集的不确定度(精度)。APAX profiler创建了一个带有推荐操作信号的速率相关图,基本限制,消费者点,提供了18个定量指标,比较原始和解码的显示输入和残差直方图的残差光谱。在气候、多物理场和地震模拟的24个整数和浮点HPC数据集上,APAX的平均编码比为7.95:1,Pearson相关系数为0。999948,频谱裕度(输入频谱最小-残差频谱平均值)为24db。HPC科学家证实,APAX并没有改变HPC模拟结果,DRAM和磁盘传输速度提高了8倍,将HPC“到结果的时间”提高了20%,同时减少了50%。
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