A 60GHz transmitter in 40nm CMOS achieving mm-precision for discrete-carrier localization

P. Indirayanti, Tuba Ayhan, M. Verhelst, W. Dehaene, P. Reynaert
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引用次数: 3

Abstract

This paper presents an efficient multicarrier 60GHz transmitter for distance measurement (ranging) in an indoor wireless localization system. By exploiting hardware-algorithm co-design, a high precision, high update rate, yet power efficient transmitter architecture is achieved, which comprises subcarrier generation through frequency division, an upconverter, and a power amplifier. An efficient frequency generation through digital design is ensured by means of co-design with the amplitude nonlinearity-tolerant algorithm. In consequence, conventional power hungry baseband blocks, such as DAC and OFDM processor, are avoided. Moreover, symbol selection is performed to minimize PAPR. The transmitter achieves 0.7-2.4mm precision demonstrated over a distance of 4m. During operation, the core digital subcarrier generator generates 16 non-equidistant subcarriers, while consuming an average power of 1.8mW out of 0.9V supply with an input clock of 3GHz. The upconverter and the power amplifier altogether consume around 127mW. The total active area of the core transmitter circuit is 0.9mm2. The chip is fabricated in a 40nm general purpose CMOS process.
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40nm CMOS的60GHz发射机,实现mm精度的离散载波定位
本文提出了一种用于室内无线定位系统中距离测量(测距)的高效60GHz多载波发射机。通过利用硬件算法协同设计,实现了高精度、高更新率、高能效的发射机架构,该架构由分频产生子载波、上变频器和功率放大器组成。通过与幅值非线性容限算法的协同设计,保证了数字化设计的高效率频率生成。因此,避免了传统的耗电基带块,如DAC和OFDM处理器。此外,执行符号选择以最小化PAPR。发射机在4米的距离内实现0.7-2.4毫米的精度。在工作过程中,核心数字子载波发生器产生16个非等距子载波,在0.9V电源和3GHz输入时钟下平均消耗1.8mW的功率。上变频器和功率放大器总共消耗约127mW。发射机核心电路的总有效面积为0.9mm2。该芯片采用40纳米通用CMOS工艺制造。
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