Pranjal Gupta, M. Srivastava, D. Prasad, Ajay Roy, Manish Kumar Verma
{"title":"A Generalized Grounded Impedance Simulator/Grounded Impedance Scaling Circuit with Electronic Tuning","authors":"Pranjal Gupta, M. Srivastava, D. Prasad, Ajay Roy, Manish Kumar Verma","doi":"10.1109/SPIN.2018.8474111","DOIUrl":null,"url":null,"abstract":"This research paper proposes a new circuit configuration which can act like a grounded impedance simulator/grounded impedance scaling circuit. The presented configuration can simulate electronically tunable grounded resistance/capacitance/inductance/FDNR and also work as a grounded impedance multiplier circuit, which can scale-up/scale-down the value of arbitrary grounded impedance with an electronically controllable multiplication factor. The proposed circuit employed three voltage difference trans-conductance amplifiers along with three grounded passive elements. The use of grounded passive elements makes this realization suitable for monolithic integration. The presented circuit does not have any requirement of matched passive elements. Under non ideal conditions the behavior of proposed configuration is found un-deviated. To verify the mathematical analysis, the presented configuration is simulated under PSPICE TSMC 0.18μm simulation environment.","PeriodicalId":184596,"journal":{"name":"2018 5th International Conference on Signal Processing and Integrated Networks (SPIN)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 5th International Conference on Signal Processing and Integrated Networks (SPIN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPIN.2018.8474111","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This research paper proposes a new circuit configuration which can act like a grounded impedance simulator/grounded impedance scaling circuit. The presented configuration can simulate electronically tunable grounded resistance/capacitance/inductance/FDNR and also work as a grounded impedance multiplier circuit, which can scale-up/scale-down the value of arbitrary grounded impedance with an electronically controllable multiplication factor. The proposed circuit employed three voltage difference trans-conductance amplifiers along with three grounded passive elements. The use of grounded passive elements makes this realization suitable for monolithic integration. The presented circuit does not have any requirement of matched passive elements. Under non ideal conditions the behavior of proposed configuration is found un-deviated. To verify the mathematical analysis, the presented configuration is simulated under PSPICE TSMC 0.18μm simulation environment.