{"title":"Realization of narrow-band SC-filters with low power consumption","authors":"A. Korotkov, H. Hauer, S. Ponomarev, D. Morozov","doi":"10.1109/ECCSC.2008.4611648","DOIUrl":null,"url":null,"abstract":"Synthesis of a narrow band switched-capacitor (SC) filter is discussed. Design is based on element simulation method when inductors of the filter prototype have been realized by 4-phase controlled single OpA SC-imitator that gives a possibility to decrease power consumption of the device. A six order Chebyshev type bandpass SC-filter with a middle frequency 1980 Hz and a frequency band 200 Hz has been synthesized and practically implemented in 0.35 mum CMOS process. The input referred RMS noise is 140 muV while HD2 and HD3 are -45, -53 dB consequently when the input signal amplitude is equal to about 90 mV. The total current consumption of the filter is 420 muA with 3.3 V voltage supply. The active area of the filter is 800 mum x 500 mum.","PeriodicalId":249205,"journal":{"name":"2008 4th European Conference on Circuits and Systems for Communications","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 4th European Conference on Circuits and Systems for Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCSC.2008.4611648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Synthesis of a narrow band switched-capacitor (SC) filter is discussed. Design is based on element simulation method when inductors of the filter prototype have been realized by 4-phase controlled single OpA SC-imitator that gives a possibility to decrease power consumption of the device. A six order Chebyshev type bandpass SC-filter with a middle frequency 1980 Hz and a frequency band 200 Hz has been synthesized and practically implemented in 0.35 mum CMOS process. The input referred RMS noise is 140 muV while HD2 and HD3 are -45, -53 dB consequently when the input signal amplitude is equal to about 90 mV. The total current consumption of the filter is 420 muA with 3.3 V voltage supply. The active area of the filter is 800 mum x 500 mum.