I. Jahangir, D. Hasan, Nahian Alam Siddique, Shajid Islam, Mehedi Hasan
{"title":"Design of quaternary sequential circuits using a newly proposed quaternary algebra","authors":"I. Jahangir, D. Hasan, Nahian Alam Siddique, Shajid Islam, Mehedi Hasan","doi":"10.1109/ICCIT.2009.5407139","DOIUrl":null,"url":null,"abstract":"Using a novel quaternary algebra, several sequential circuits are designed. The quaternary logic scheme used here is obtained by extending Boolean algebra into quaternary domain. A set of operators capable of handling both coupled-binary and ordinary inputs are used to design the sequential circuit elements such as latches, flip-flops, registers and counters. Sufficient conditions for stable operation of the sequential blocks are derived mathematically and demonstrated graphically using simulated timing diagrams.","PeriodicalId":443258,"journal":{"name":"2009 12th International Conference on Computers and Information Technology","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 12th International Conference on Computers and Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCIT.2009.5407139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
Using a novel quaternary algebra, several sequential circuits are designed. The quaternary logic scheme used here is obtained by extending Boolean algebra into quaternary domain. A set of operators capable of handling both coupled-binary and ordinary inputs are used to design the sequential circuit elements such as latches, flip-flops, registers and counters. Sufficient conditions for stable operation of the sequential blocks are derived mathematically and demonstrated graphically using simulated timing diagrams.