Design of Convolutional Neural Network Based on FPGA

Hasnae El Khoukhi, Y. Filali, M. A. Sabri, A. Aarab
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引用次数: 1

Abstract

Recently with the rapid development of artificial intelligence AI, various deep learning algorithms represented by Convolutional Neural Networks (CNN) have been widely utilized in various fields, showing their unique advantages; especially in Skin Cancer (SC) imaging Neural networks (NN) are methods for performing machine learning (ML) and reside in what's called deep learning (DL). DL refers to the utilization of multiple layers during a neural network to perform the training and classification of data. The Convolutional Neural Networks (CNNs), a kind of neural network and a prominent machine learning algorithm go through multiple phases before they get implemented in hardware to perform particular tasks for a specific application. State-of-the-art CNNs are computationally intensive, yet their parallel and modular nature make platforms like Field Programmable Gate Arrays (FPGAs) compatible with the acceleration process. The objective of this paper is to implement a hardware architecture capable of running on an FPGA platform of a convolutional neural network CNN, for that, a study was made by describing the operation of the concerned modules, we detail them then we propose a hardware architecture with RTL scheme for each of these modules using the software ISE (Xilinx). The main objective is to show the efficiency of such a realization compared to a GPU based execution. An experimental study is accomplished for the PH2 database set of benchmark images. The proposed FPGA-based CNN design gives competitive results and shows well its efficiency.
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基于FPGA的卷积神经网络设计
近年来,随着人工智能AI的快速发展,以卷积神经网络(CNN)为代表的各种深度学习算法在各个领域得到了广泛的应用,显示出其独特的优势;神经网络(NN)是执行机器学习(ML)的方法,属于所谓的深度学习(DL)。深度学习是指在神经网络中利用多层来对数据进行训练和分类。卷积神经网络(cnn)是一种神经网络,也是一种著名的机器学习算法,在实现到硬件中,为特定的应用程序执行特定的任务之前,要经历多个阶段。最先进的cnn是计算密集型的,但它们的并行和模块化特性使得像现场可编程门阵列(fpga)这样的平台与加速过程兼容。本文的目的是实现一个能够在卷积神经网络CNN的FPGA平台上运行的硬件架构,为此,通过描述相关模块的操作进行了研究,我们详细介绍了它们,然后我们使用软件ISE (Xilinx)为每个模块提出了一个具有RTL方案的硬件架构。主要目的是展示这种实现与基于GPU的执行相比的效率。对PH2数据库的基准图像集进行了实验研究。本文提出的基于fpga的CNN设计取得了较好的效果,并证明了其有效性。
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