Characterization of Nonlinear On-Chip Capacitors

Abstract

The paper deals with nonlinear on-chip capacitor characterization. A modification of CBCM (charge-based capacitance measurements) has been proposed. The CBCM method was originally developed for linear interconnect-capacitance measurements. The proposed modification uses two DC swept sources to measure the whole nonlinear Q-v characteristic in both polarities without the necessity to switch the measured object. The main advantage of the method is high resolution although it is based on equipment found in any average laboratory. A test-chip implementing the method was designed and manufactured in 0.35 mum CMOS process. Verification against known capacitances proved the method correctness and accuracy. The test-chip was successfully used for MOSFET gate-capacitance characterization.