Y. Yasuda, Hiroaki Fujii, Hideya Akashi, Y. Inagami, Teruo Tanaka, Junji Nakagoshi, Hideo Wada, Tsutomu Sumimoto
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引用次数: 9
Abstract
We have developed a hardware detour path selection facility for the Hitachi SR2201 parallel computer, which uses a multi-dimensional crossbar as an inter-processor network to ensure operating efficiency and high reliability when a part of the network is faulty. When this hardware facility is used, packets are transmitted to their destination along alternative paths to avoid the fault. However, changing the routing may cause deadlock. This paper describes a deadlock-free fault-tolerant routing scheme that can be used by the detour path selection facility to avoid deadlock, and its implementation for the SR2201.
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