{"title":"Implementation of Asynchronous Receiver/ Transmitter Based on FPGA","authors":"Xiao-li Hu, Feng-ying Wang, Bo Chen","doi":"10.1109/GCIS.2012.16","DOIUrl":null,"url":null,"abstract":"This article discusses the basic principles of the universal asynchronous receiver/transmitter, and design and realize of universal asynchronous receiver/transmitter base on Alter a NIOSII Development Board integrated in EDA experiment platform. the main chip Model of the FPGA is EP1C12F324C8. Circuit design with VHDL hardware description language programming, developing software is the QuartusII9.0.","PeriodicalId":337629,"journal":{"name":"2012 Third Global Congress on Intelligent Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Third Global Congress on Intelligent Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GCIS.2012.16","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This article discusses the basic principles of the universal asynchronous receiver/transmitter, and design and realize of universal asynchronous receiver/transmitter base on Alter a NIOSII Development Board integrated in EDA experiment platform. the main chip Model of the FPGA is EP1C12F324C8. Circuit design with VHDL hardware description language programming, developing software is the QuartusII9.0.
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