Designing combinational circuits with list homomorphisms

W. Dosch
{"title":"Designing combinational circuits with list homomorphisms","authors":"W. Dosch","doi":"10.3233/jcm-2005-5s103","DOIUrl":null,"url":null,"abstract":"We present a framework for the unifying high-level synthesis of tree-structured and iterative combinational networks. Based on the theory of list homomorphisms, we develop a standard implementation for tree-structured modules processing the input digits in parallel. The design is systematically specialized to iterative networks processing the input sequentially from the least resp. from the highest significant positions. Throughout the paper, we explicate functional methods for the transformational design of combinational circuits. We illustrate the approach with a parity generator module, a comparator module, and a priority resolution module.","PeriodicalId":424175,"journal":{"name":"Third ACIS Int'l Conference on Software Engineering Research, Management and Applications (SERA'05)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third ACIS Int'l Conference on Software Engineering Research, Management and Applications (SERA'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.3233/jcm-2005-5s103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

We present a framework for the unifying high-level synthesis of tree-structured and iterative combinational networks. Based on the theory of list homomorphisms, we develop a standard implementation for tree-structured modules processing the input digits in parallel. The design is systematically specialized to iterative networks processing the input sequentially from the least resp. from the highest significant positions. Throughout the paper, we explicate functional methods for the transformational design of combinational circuits. We illustrate the approach with a parity generator module, a comparator module, and a priority resolution module.
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用表同态设计组合电路
我们提出了一个统一的树状结构和迭代组合网络的高层综合框架。基于表同态理论,我们开发了一个并行处理输入数字的树结构模块的标准实现。该设计系统地专门用于从最小响应开始依次处理输入的迭代网络。从最重要的位置。在整个论文中,我们阐述了组合电路转换设计的泛函方法。我们用奇偶生成器模块、比较器模块和优先级解析模块来说明这种方法。
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