Research on network fault tolerance method on chip

Abstract

NoC has redundant features, that is to say, there are multiple paths from the source node to destination node, these provided conditions for us to study fault-tolerant routing algorithm. This thesis proposes a new fault-tolerant algorithm by studying the existing fault-tolerant routing algorithm. Divide each node into edge nodes and internal nodes based on the network's position of 2D - Mesh topology structure. In view of the respective characteristics of these two types of nodes this thesis puts forward relatively fast path decision model or turning model to help more quickly determine the routing node in its own characteristics of the current task best transmission path. It can significantly reduce the repeated operation time, reduce the amount of data calculation, help to ease and restrictions on the generation of network congestion and improve the data processing efficiency of the whole piece on the network‥