Charge sensitive amplifier for nanoseconds pulse processing time in CMOS 40 nm technology

Abstract

The level of requirements for a readout front-end electronics dedicated for X-ray imaging applications, such as: high count rate ability of input pulses, low noise, low power dissipation and low silicon area occupation noise, is still increasing. The question: what one can do to minimize silicon area and keep front-end electronics analog parameters at a desirable level at the same time, is still important especially in pixel based architecture imaging applications. We report on the design of a readout front-end electronics analog part in CMOS 40 nm technology dedicated for pixel semiconductor detectors. It consists only a charge sensitive amplifier operating in transimpedance mode, which feedback circuit is based on a Krummenacher architecture. It has power dissipation below tens of μW, noise performance ENC around 100 e- rms and pulse peaking time tp around few ns.