{"title":"Design of up conversion mixer with enhanced transconductance stage and low power consumption oscillator","authors":"Chang-Hsi Wu, Guan-Xiu Jian","doi":"10.1109/ISSSE.2010.5607017","DOIUrl":null,"url":null,"abstract":"A 5.2 GHz self-oscillating mixer (SOM) for IEEE 802.11a WLAN transmitter, fabricated using CMOS 0.18μm process, is presented in this paper. The conversion gain of the proposed Mixer is mainly upgraded by an enhanced transconductance technique. To reduce the power consumption, the proposed voltage controlled oscillator (VCO) employs a complementarily cross-coupled architecture. Under 1.5V and 0.6V supply voltage of Mixer and VCO, respectively, the simulated results of the proposed Mixer reveal a conversion gain of 10.74dB, input third-order intercept (IIP3) of −4.8dBm, phase noise of −116.2dBc/Hz at 1 MHz offset and tuning range of 4.615GHz~5.335GHz (14.12%) while total power consumption is only 7.3mW. The size of the chip is 0.741mm ×1.291mm.","PeriodicalId":211786,"journal":{"name":"2010 International Symposium on Signals, Systems and Electronics","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Symposium on Signals, Systems and Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSSE.2010.5607017","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A 5.2 GHz self-oscillating mixer (SOM) for IEEE 802.11a WLAN transmitter, fabricated using CMOS 0.18μm process, is presented in this paper. The conversion gain of the proposed Mixer is mainly upgraded by an enhanced transconductance technique. To reduce the power consumption, the proposed voltage controlled oscillator (VCO) employs a complementarily cross-coupled architecture. Under 1.5V and 0.6V supply voltage of Mixer and VCO, respectively, the simulated results of the proposed Mixer reveal a conversion gain of 10.74dB, input third-order intercept (IIP3) of −4.8dBm, phase noise of −116.2dBc/Hz at 1 MHz offset and tuning range of 4.615GHz~5.335GHz (14.12%) while total power consumption is only 7.3mW. The size of the chip is 0.741mm ×1.291mm.