Hardware Implementation of Continued Logarithm Arithmetic

Abstract

This paper gives details on architecture of an arithmetic unit built on principles of continued logarithms and provides its sample characterization using FPGA technology. Continued logarithms can be used for exact arithmetic, but similarly to other exact/reliable methods they face the instant problem of poor performance. Their naturally binary character, however, gives them a good potential to be realized directly in hardware. We prove feasibility of this approach by constructing a continued logarithm unit and quantifying its possible performance.