Design and reliability challenges in nanometer technologies

Abstract

CMOS technology scaling is causing the channel lengths to be sub-wavelength of light. Parameter variation, caused by sub-wavelength lithography, will pose a major challenge for design and reliability of future high performance microprocessors in nanometer technologies. In this paper, we present the impact of these variations on processor functionality, Predictability and reliability. We propose design and CAD solutions for variation tolerance. We conclude this paper with sofi error rate scaling trends and sofl error tolerant circuits for reliabilitv enhancement.