Analysis of Fast Algorithm of Matrix-Vector Multiplication for the Bank of Digital Filters

V. Kreyndelin, E. D. Grigorieva
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引用次数: 1

Abstract

Algorithms of implementation of vector-matrix multiplication are presented, which are intended for application in banks (sets) of digital filters. These algorithms provide significant savings in computational costs over traditional algorithms. At the same time, reduction of computational complexity of algorithms is achieved without any performance loss of banks (sets) of digital filters. As the basis for the construction of algorithms proposed in the article, the previously known Winograd method of multiplication of real matrices and vectors and two versions of the method of type 3M for multiplication of complex matrices and vectors are used. Methods of combining these known methods of multiplying matrices and vectors for building digital filter banks (sets) are considered. The analysis of computing complexity of such ways which showed a possibility of reduction of computing complexity in comparison with a traditional algorithm of realization of bank (set) of digital filters approximately in 2.66 times - at realization on the processor without hardware multiplier is carried out; and by 1.33 times - at realization on the processor with the hardware multiplier. These indicators are markedly higher than those of known algorithms. Analysis of sensitivity of algorithms proposed in this article to rounding errors arising by digital signal processing was carried out. Based on this analysis, an algorithm is selected that has a computational complexity smaller than that of a traditional algorithm, but its sensitivity to rounding errors is the same as that of a traditional algorithm. Recommendations are given on its practical application in the development of a bank (set) of digital filters.
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数字滤波器组矩阵-向量乘法快速算法分析
提出了一种矢量矩阵乘法的实现算法,用于数字滤波器组(组)。与传统算法相比,这些算法显著节省了计算成本。同时,在不损失数字滤波器组(组)性能的前提下,降低了算法的计算复杂度。作为本文提出的算法构建的基础,我们使用了之前已知的实数矩阵与向量相乘的Winograd方法和两个版本的复数矩阵与向量相乘的3M型方法。结合这些已知的矩阵和向量乘法方法来构建数字滤波器组(集)。对这些方法的计算复杂度进行了分析,结果表明,与在处理器上实现一组(组)数字滤波器的传统算法相比,在没有硬件乘法器的情况下,计算复杂度大约降低了2.66倍;在使用硬件乘法器的处理器上实现了1.33倍。这些指标明显高于已知算法的指标。分析了本文提出的算法对数字信号处理产生的舍入误差的敏感性。在此基础上,选择一种计算复杂度小于传统算法,但对舍入误差的敏感性与传统算法相同的算法。并对其在一组数字滤波器开发中的实际应用提出了建议。
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