3GPP2/802.20 RC/QC-LDPC encoding

Abstract

Rate-Compatible/Quasi-Cyclic LDPC codes are gaining importance because of their tradeoff between performance and simplicity. For these reasons, RC/QC LDPC codes have been included in several recent standards such as 802.20 and 3GPP2. General proposals for hardware encoding of this kind of LDPC codes either consume a lot of area to increase the throughput or are slow-encoding schemes to reduce the area consumption. Some others have to pre-compute a non-sparse generator matrix and store it in memory in order to encode. In contrast, by exploiting the number of null matrices in the mother parity check matrix defined in these standards, this proposal defines a low-cost encoder with high input packet throughput (little time between input frames). Moreover, as the encoding is performed using the original parity check matrix, there is no need to pre-compute or store the dense generation matrix in memory.