{"title":"Integrated DC-DC converter design for improved WCDMA power amplifier efficiency in SiGe BiCMOS technology","authors":"D. Guckenberger, K. Kornegay","doi":"10.1145/871506.871617","DOIUrl":null,"url":null,"abstract":"We present a DC-DC converter design for on-chip integration with a WCDMA power amplifier to provide supply voltage modulation and efficiency enhancement. It operates from a 3.3 V supply using 0.35 /spl mu/m 'high-breakdown' CMOS transistors available in IBM's SiGe BiCMOS 6H:P process. Five selectable output voltage levels are available ranging from 1.3 V to 3.3 V. The converter is optimized for operation at 88.7 MHz. Simulation results show an average efficiency of 78.8% over the power amplifier operating conditions and a peak enabled efficiency of 86%. CCM-DCM mode switching and transistor width switching are used to minimize losses at the different output voltage and current load levels.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/871506.871617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20
Abstract
We present a DC-DC converter design for on-chip integration with a WCDMA power amplifier to provide supply voltage modulation and efficiency enhancement. It operates from a 3.3 V supply using 0.35 /spl mu/m 'high-breakdown' CMOS transistors available in IBM's SiGe BiCMOS 6H:P process. Five selectable output voltage levels are available ranging from 1.3 V to 3.3 V. The converter is optimized for operation at 88.7 MHz. Simulation results show an average efficiency of 78.8% over the power amplifier operating conditions and a peak enabled efficiency of 86%. CCM-DCM mode switching and transistor width switching are used to minimize losses at the different output voltage and current load levels.
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