{"title":"Fast transient current mode dc-dc converter with optimized loop response","authors":"Chi-Yuan Huang, Kai-Yu Hu, Shih-Mei Lin, Chien-Hung Tsai","doi":"10.1109/IFEEC.2015.7361526","DOIUrl":null,"url":null,"abstract":"A current mode switching regulator with optimized loop response, providing fast load transient response is proposed in this paper. Unlike conventional current mode control where the pole zero cancelation technique is used in the compensation design, the proposed system move the compensation zero to a higher frequency to achieve a higher loop gain in a fixed loop bandwidth. The higher loop gain can lead to a smaller closed-loop line-to-output and output impedance, which in other word, the proposed optimized loop response dc-dc converter can serve better line and load transient response. The measurement results show that this converter can operate with load current from 200 to 500 mA in a supply voltage from 2.7 to 4.2 V and the output voltage of 1.8V. The recovery time is about 10us and the highest efficiency is 93%. This converter is designed and fabricated with TSMC 2P4M 0.35μm CMOS process.","PeriodicalId":268430,"journal":{"name":"2015 IEEE 2nd International Future Energy Electronics Conference (IFEEC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 2nd International Future Energy Electronics Conference (IFEEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IFEEC.2015.7361526","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A current mode switching regulator with optimized loop response, providing fast load transient response is proposed in this paper. Unlike conventional current mode control where the pole zero cancelation technique is used in the compensation design, the proposed system move the compensation zero to a higher frequency to achieve a higher loop gain in a fixed loop bandwidth. The higher loop gain can lead to a smaller closed-loop line-to-output and output impedance, which in other word, the proposed optimized loop response dc-dc converter can serve better line and load transient response. The measurement results show that this converter can operate with load current from 200 to 500 mA in a supply voltage from 2.7 to 4.2 V and the output voltage of 1.8V. The recovery time is about 10us and the highest efficiency is 93%. This converter is designed and fabricated with TSMC 2P4M 0.35μm CMOS process.