D. Reddy, K. Akshay, R. Giridhar, S. Karan, N. Mohankumar
{"title":"BHARKS: Built-in hardware authentication using random key sequence","authors":"D. Reddy, K. Akshay, R. Giridhar, S. Karan, N. Mohankumar","doi":"10.1109/ISPCC.2017.8269675","DOIUrl":null,"url":null,"abstract":"In today's world, as the demand for IC production grows exponentially, testing and validation of all the manufactured chips becomes impossible. Therefore, in the proposed method, we have developed a technique for embedding unique signatures with minimalistic hardware or area overhead while preserving the intended functionality. To achieve this, three ‘levels’ of security are provided. First, circuit specific information is derived and used for signature generation. Second, the generated signature is hashed, obfuscating the logic reverse engineering process and finally a bit sequence from a Pseudo-Random Number Generator (PRNG) to make it unfeasibly difficult for the attacker to decode the signature.","PeriodicalId":142166,"journal":{"name":"2017 4th International Conference on Signal Processing, Computing and Control (ISPCC)","volume":"30 41","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 4th International Conference on Signal Processing, Computing and Control (ISPCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCC.2017.8269675","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
In today's world, as the demand for IC production grows exponentially, testing and validation of all the manufactured chips becomes impossible. Therefore, in the proposed method, we have developed a technique for embedding unique signatures with minimalistic hardware or area overhead while preserving the intended functionality. To achieve this, three ‘levels’ of security are provided. First, circuit specific information is derived and used for signature generation. Second, the generated signature is hashed, obfuscating the logic reverse engineering process and finally a bit sequence from a Pseudo-Random Number Generator (PRNG) to make it unfeasibly difficult for the attacker to decode the signature.