Implementation and verification of DPA-resistant cryptographic DES circuit using Domino-RSL

Abstract

Differential Power Analysis (DPA) which is one of the Side-Channel Attack techniques can easily extract the secret information such as a cryptographic key from the device by analyzing the power consumption. Some DPA-resistant techniques have been proposed to protect the secret information. However, these techniques require special CADs, which balance wiring capacitance and control the timing to activate the logics for enabling signals. We have proposed a DPA-resistant Domino-RSL technique to design and implement by the standard CAD tool easily. This DPA resistance is achieved by eliminating the correlation between power consumption and cryptography operation. In this paper, the design flow of the Domino-RSL technique is presented and the DPA resistance of a DES circuit, which was designed and fabricated with 0.18μm CMOS technology, is evaluated using the Side-channel Attack Standard Evaluation Board (SASEBO). The Domino-RSL DES circuit did never reveal the secret key even with 100,000 wave samples analysis.