On Increasing Architecture Awareness in Program Optimizations to Bridge the Gap between Peak and Sustained Processor Performance — Matrix-Multiply Revisited

David Parello, O. Temam, J. Verdun
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引用次数: 28

Abstract

As the complexity of processor architectures increases, there is a widening gap between peak processor performance and sustained processor performance so that programs now tend to exploit only a fraction of available performance. While there is a tremendous amount of literature on program optimizations, compiler optimizations lack efficiency because they are plagued by three flaws: (1) they often implicitly use simplified, if not simplistic, models of processor architecture, (2) they usually focus on a single processor component (e.g., cache) and ignore the interactions among multiple components, (3) the most heavily nvestigated components (e.g., caches) sometimes have only a small impact on overall performance. Through the in-depth analysis of a simple program kernel, we want to show that understanding the complex interactions between programs and the numerous processor architecture components is both feasible and critical to design efficient program optimizations.
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提高程序优化中的体系结构意识以弥合峰值和持续处理器性能之间的差距—矩阵相乘重新审视
随着处理器体系结构复杂性的增加,峰值处理器性能和持续处理器性能之间的差距越来越大,因此程序现在倾向于只利用可用性能的一小部分。虽然有大量关于程序优化的文献,但编译器优化缺乏效率,因为它们受到三个缺陷的困扰:(1)它们通常隐式地使用简化的处理器体系结构模型,(2)它们通常关注单个处理器组件(例如缓存)而忽略多个组件之间的交互,(3)最深入研究的组件(例如缓存)有时对整体性能只有很小的影响。通过对一个简单程序内核的深入分析,我们希望表明,理解程序与众多处理器体系结构组件之间的复杂交互对于设计有效的程序优化既可行又至关重要。
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