An automated system for LSI fine pattern inspection based on comparison of SEM images and CAD data

Abstract

This paper describes a new visual inspection system that can reliably detect fine defects as small as 0.1 /spl mu/m in mask/wafer patterns on the basis of comparison between scanning electron microscopic (SEM) images and design data. The chip-to-CAD comparison makes it possible to reliably detect significant defects that commonly occur in all chips on a mask/wafer. To cope with the difficult problems that arise when comparing heavily deteriorated SEM images with CAD patterns, new visual inspection algorithms are proposed for the thresholding for extracting pattern portions, correction of image positional displacements, and extraction and classification of significant defects. An automated system featuring parallel/pipeline processing and a simple and flexible structure has been constructed taking the complicated processing of deteriorating SEM images into account. When the input image resolution is set to 0.05 /spl mu/m/pixel, experiments confirm 0.1 /spl mu/m defects are unfailingly detected with the throughput of 1/spl sim/2 sec/frame. The proposed system is expected to make a substantial contribution to forthcoming developments in the visual inspection of very fine mask/wafer patterns.