Hardware realisable models of neural processing

Abstract

Summary form only given. An identity that has been recently established by D. Gorse and J.G. Taylor (Phys. Lett., vol.A131, p.326, 1988) between a certain class of neural model (originally proposed by Taylor) and a simple piece of electronic hardware, the probabilistic random-access memory (pRAM) holds out the possibility of mimicking physiological nets in hardware. The Taylor model has recently been extended to examine in more detail the pre- and postsynaptic processes that lead up to neural firing. The extended model retains the successful features of the original, but by operating at much shorter time scales (on the order of the lifetime of a quantum of neurotransmitter in the synaptic cleft) it allows higher order statistical information to be retrieved from the simulated spike train. It is capable of incorporating a great deal of biological detail, including effects associated with the mechanism of summation of postsynaptic potentials (PSPs), cell surface geometry, and axo-axonal interactions. Like its predecessor the new model has a straightforward hardware implementation as a pRAM, in which parameters relating to PSP summation and firing behavior can be changed by simply writing to the appropriate set of memory locations.<>