ASIC microprocessors

MICRO 22 Pub Date : 1989-08-01 DOI:10.1145/75362.75425
M. Flynn, R. I. Winner
{"title":"ASIC microprocessors","authors":"M. Flynn, R. I. Winner","doi":"10.1145/75362.75425","DOIUrl":null,"url":null,"abstract":"ASIC microprocessors are becoming an important technology for the control of complex (“embedded”) systems. The advantage of such microprocessors is that they can be tailored to the application. This tailoring is quite non-intuitive and optimization is a complex process. Tools such as the Architect's Workbench (AWB) have been developed to assist in this optimization. An example study shows a more than two to one advantage of such assisted analysis.","PeriodicalId":365456,"journal":{"name":"MICRO 22","volume":"131 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 22","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/75362.75425","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11

Abstract

ASIC microprocessors are becoming an important technology for the control of complex (“embedded”) systems. The advantage of such microprocessors is that they can be tailored to the application. This tailoring is quite non-intuitive and optimization is a complex process. Tools such as the Architect's Workbench (AWB) have been developed to assist in this optimization. An example study shows a more than two to one advantage of such assisted analysis.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
ASIC微处理器
ASIC微处理器正成为控制复杂(“嵌入式”)系统的重要技术。这种微处理器的优点是它们可以根据应用程序进行定制。这种裁剪非常不直观,优化是一个复杂的过程。诸如架构师工作台(Architect’s Workbench, AWB)之类的工具已经被开发出来,以帮助进行这种优化。一个实例研究表明,这种辅助分析的优势超过二比一。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Incremental foresighted local compaction MIES: a microarchitecture design tool Functional languages in microcode compilers “Combining” as a compilation technique for VLIW architectures On reordering instruction streams for pipelined computers
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1