{"title":"Towards policy and guidelines for the selection of computational engines","authors":"R. Hernandez, John Faella","doi":"10.1109/SysCon.2013.6549864","DOIUrl":null,"url":null,"abstract":"Much research has been performed that concentrates on providing processing throughput enhancements to existing algorithms. Many systems have performance requirements that constrain their volume and/or power consumption. For volume and power consumption constrained systems, throughput cannot be the only decision factor when selecting a computational engine. Typical studies can aid in the selection of computational engines that meet the throughput requirements of a system, but may be of little help with respect to the volume, power and thermal constraints. This paper takes a different approach to help provide a different perspective on the constrained design problem. The research performed in this paper emphasizes the cost due to the power, size and Non-Recurring Engineering (NRE) costs of various computational engines. The computational engines researched in this paper are: Central Processing Unit (CPU), mobile CPU, Digital Signal Processor (DSP), and mobile Graphics Processing Unit (GPU). The various architectures are compared against each other with respect to throughput, power, size and NRE costs. The authors hope that the process outlined in this paper may serve as a possible guideline for other Systems Engineers to perform similar Analysis of Alternatives of computational engines. Furthermore, the authors hope that the methods used for the relative performance evaluations will serve as a starting point to help shape policy in the selection of computational engines for future designs.","PeriodicalId":218073,"journal":{"name":"2013 IEEE International Systems Conference (SysCon)","volume":"6 13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Systems Conference (SysCon)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SysCon.2013.6549864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Much research has been performed that concentrates on providing processing throughput enhancements to existing algorithms. Many systems have performance requirements that constrain their volume and/or power consumption. For volume and power consumption constrained systems, throughput cannot be the only decision factor when selecting a computational engine. Typical studies can aid in the selection of computational engines that meet the throughput requirements of a system, but may be of little help with respect to the volume, power and thermal constraints. This paper takes a different approach to help provide a different perspective on the constrained design problem. The research performed in this paper emphasizes the cost due to the power, size and Non-Recurring Engineering (NRE) costs of various computational engines. The computational engines researched in this paper are: Central Processing Unit (CPU), mobile CPU, Digital Signal Processor (DSP), and mobile Graphics Processing Unit (GPU). The various architectures are compared against each other with respect to throughput, power, size and NRE costs. The authors hope that the process outlined in this paper may serve as a possible guideline for other Systems Engineers to perform similar Analysis of Alternatives of computational engines. Furthermore, the authors hope that the methods used for the relative performance evaluations will serve as a starting point to help shape policy in the selection of computational engines for future designs.