Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design

Amith Singhee, Jiajing Wang, B. Calhoun, Rob A. Rutenbar
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引用次数: 64

Abstract

Circuit reliability under statistical process variation is an area of growing concern. For highly replicated circuits such as SRAMs and flip flops, a rare statistical event for one circuit may induce a not-so-rare system failure. The Statistical Blockade was proposed as a Monte Carlo technique that allows us to efficiently filter-to block-unwanted samples insufficiently rare in the tail distributions we seek. However, there are significant practical problems with the technique. In this work, we show common scenarios in SRAM design where these problems render Statistical Blockade ineffective. We then propose significant extensions to make Statistical Blockade practically usable in these common scenarios. We show speedups of 102+ over standard Statistical Blockade and 104+ over standard Monte Carlo, for an SRAM cell in an industrial 90 nm technology.
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递归统计阻塞:一种改进的稀有事件模拟技术及其在SRAM电路设计中的应用
统计过程变化下的电路可靠性是一个日益受到关注的领域。对于高度复制的电路,如sram和触发器,一个电路的罕见统计事件可能会导致不太罕见的系统故障。统计封锁是作为蒙特卡罗技术提出的,它允许我们有效地过滤-阻止在我们寻求的尾部分布中不够罕见的不需要的样本。然而,该技术存在重大的实际问题。在这项工作中,我们展示了SRAM设计中的常见场景,这些问题使统计封锁无效。然后,我们提出了重要的扩展,使统计封锁在这些常见场景中实际可用。我们展示了在工业90纳米技术下的SRAM单元的速度比标准统计封锁快102+,比标准蒙特卡罗快104+。
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