{"title":"Topological mapping formation in a neural network with variations of device characteristics","authors":"K. Tsuji, H. Yonezu, Jae-Kyun Shin","doi":"10.1109/MNNFS.1996.493803","DOIUrl":null,"url":null,"abstract":"The neural network of a human brain can well perform higher-order-information processing which could not be achieved by Neuman-type computers. In order to perform the processing, it is necessary to fabricate artificial neural systems which can form the topological mapping through learning. A new learning algorithm and a new network model have been proposed for fabrication by means of CMOS analog circuits with variations of device characteristics. The functions of those circuits were confirmed by means of SPICE simulations and the functions of PDM (pulse density modulator) were confirmed experimentally. The learning simulations of the network consisting of the circuits have also been carried out. The results show that the topological mapping is almost formed, even when variations of device characteristics exist in the neural network. The results also reveal that calculating the weighted sum of each neuron's potential and potentials of its surrounding neurons as the output of each neuron and adding proper number of redundant neurons to the output layer are effective mechanisms for the network with variations of device characteristics.","PeriodicalId":151891,"journal":{"name":"Proceedings of Fifth International Conference on Microelectronics for Neural Networks","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-02-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Fifth International Conference on Microelectronics for Neural Networks","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MNNFS.1996.493803","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The neural network of a human brain can well perform higher-order-information processing which could not be achieved by Neuman-type computers. In order to perform the processing, it is necessary to fabricate artificial neural systems which can form the topological mapping through learning. A new learning algorithm and a new network model have been proposed for fabrication by means of CMOS analog circuits with variations of device characteristics. The functions of those circuits were confirmed by means of SPICE simulations and the functions of PDM (pulse density modulator) were confirmed experimentally. The learning simulations of the network consisting of the circuits have also been carried out. The results show that the topological mapping is almost formed, even when variations of device characteristics exist in the neural network. The results also reveal that calculating the weighted sum of each neuron's potential and potentials of its surrounding neurons as the output of each neuron and adding proper number of redundant neurons to the output layer are effective mechanisms for the network with variations of device characteristics.