Design of 4:1 Multiplexer using Gate Diffusion Input Technique and Comparison of Delay and Power Performance with CMOS Logic

B. Sai kumar, A. Akilandeswari, Emg Subramanian
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Abstract

The aim of this research is to develop a 4:1 mul-tiplexer using the advanced GDI logic. As compared to CMOS transistor logic, GDI technique reduces the power consumption and propagation delay. Materials and Methods: There are two groups namely CMOS logic and GDI. A total of 20 samples are used to compare the propagation delay and power in which CMOS of group size 10 and GDI of group size 10. The samples are calculated with a pretest power of 80%, a confidence interval of 95% and alpha value of 0.05. Result: The propagation delay of the GDI approach is 0.4550 ns, power dissipation of 1.5070 μW, while CMOS transistor logic has more propagation delay and power consumption. It has a propagation delay of 0.8350 ns and a power dissipation of 3.5000 μW with significance of 0.02. Conclusion: The new GDI approach delivers reduced propagation delay and power consumption than CMOS transistor logic.
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采用门扩散输入技术的4:1多路复用器设计及CMOS逻辑的延迟和功耗性能比较
本研究的目的是利用先进的GDI逻辑开发4:1多路复用器。与CMOS晶体管逻辑相比,GDI技术降低了功耗和传播延迟。材料和方法:有两组,即CMOS逻辑和GDI。共使用20个样本比较了组尺寸为10的CMOS和组尺寸为10的GDI的传播延迟和功率。计算样本时,预试功率为80%,置信区间为95%,alpha值为0.05。结果:GDI方法的传播延迟为0.4550 ns,功耗为1.5070 μW,而CMOS晶体管逻辑具有更大的传播延迟和功耗。它的传输延迟为0.8350 ns,功耗为3.5000 μW,显著性为0.02。结论:新的GDI方法比CMOS晶体管逻辑具有更低的传输延迟和功耗。
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