Spin wave nanofabric update

J. G. Alzate, P. Upadhyaya, Mark Lewis, J. Nath, Yen-Ting Lin, Kin L. Wong, S. Cherepov, P. Amiri, K. Wang, J. L. Hockel, A. Bur, G. Carman, S. Bender, Y. Tserkovnyak, Jian Zhu, Y. Chen, I. Krivorotov, J. Katine, J. Langer, Prasad Shabadi, S. Khasanvis, S. Narayanan, C. A. Moritz, A. Khitun
{"title":"Spin wave nanofabric update","authors":"J. G. Alzate, P. Upadhyaya, Mark Lewis, J. Nath, Yen-Ting Lin, Kin L. Wong, S. Cherepov, P. Amiri, K. Wang, J. L. Hockel, A. Bur, G. Carman, S. Bender, Y. Tserkovnyak, Jian Zhu, Y. Chen, I. Krivorotov, J. Katine, J. Langer, Prasad Shabadi, S. Khasanvis, S. Narayanan, C. A. Moritz, A. Khitun","doi":"10.1145/2765491.2765526","DOIUrl":null,"url":null,"abstract":"We provide a progress update on the spin wave nanofabric. The nanofabric comprises magneto-electric cells and spin wave buses serving for spin wave propagation. The magneto-electric cells are used as the input/output ports for information transfer between the charge and the spin domains, while information processing inside the nanofabric is via spin waves only. Information is encoded into the phase of the propagating spin wave, which makes it possible to utilize waveguides as passive logic elements and take the advantage of using wave superposition for data processing. This provides a fundamental advantage over the conventional transistor-based logic circuitry allowing for functional throughput enhancement and power consumption minimization at the same time. We present recent accomplishments in the magneto-electric element development and integration with spin wave buses. In particular, we show the excitation and detection of the spin waves via multiferroic elements. In addition, we present different approaches to magnonic logic circuit engineering and provide the comparison with CMOS by mapping the designs to 45nm NANGATE standard cell libraries. The estimates show more than 40X power reduction and 53X area reduction for magnonic circuits. These results illustrate the potential advantages over conventional charge based electronics that could be a route to beyond CMOS logic circuitry.","PeriodicalId":287602,"journal":{"name":"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2765491.2765526","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

Abstract

We provide a progress update on the spin wave nanofabric. The nanofabric comprises magneto-electric cells and spin wave buses serving for spin wave propagation. The magneto-electric cells are used as the input/output ports for information transfer between the charge and the spin domains, while information processing inside the nanofabric is via spin waves only. Information is encoded into the phase of the propagating spin wave, which makes it possible to utilize waveguides as passive logic elements and take the advantage of using wave superposition for data processing. This provides a fundamental advantage over the conventional transistor-based logic circuitry allowing for functional throughput enhancement and power consumption minimization at the same time. We present recent accomplishments in the magneto-electric element development and integration with spin wave buses. In particular, we show the excitation and detection of the spin waves via multiferroic elements. In addition, we present different approaches to magnonic logic circuit engineering and provide the comparison with CMOS by mapping the designs to 45nm NANGATE standard cell libraries. The estimates show more than 40X power reduction and 53X area reduction for magnonic circuits. These results illustrate the potential advantages over conventional charge based electronics that could be a route to beyond CMOS logic circuitry.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
自旋波纳米织物的更新
我们提供了自旋波纳米织物的最新进展。所述纳米织物包括磁电电池和用于自旋波传播的自旋波总线。磁电电池用作电荷域和自旋域之间信息传递的输入/输出端口,而纳米织物内部的信息处理仅通过自旋波进行。信息被编码到传播自旋波的相位中,这使得利用波导作为无源逻辑元件和利用波叠加的优势进行数据处理成为可能。与传统的基于晶体管的逻辑电路相比,这提供了一个基本的优势,可以同时增强功能吞吐量和最小化功耗。我们介绍了磁电元件开发和自旋波总线集成方面的最新成就。特别地,我们展示了通过多铁性元件激发和探测自旋波。此外,我们提出了不同的磁逻辑电路工程方法,并通过将设计映射到45nm NANGATE标准单元库,与CMOS进行比较。估计显示,磁电路的功耗降低了40倍以上,面积减少了53倍。这些结果说明了传统基于电荷的电子器件的潜在优势,这可能是超越CMOS逻辑电路的途径。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Gate-level modeling for CMOS circuit simulation with ultimate FinFETs A novel write-scheme for data integrity in memristor-based crossbar memories Ternary volatile random access memory based on heterogeneous graphene-CMOS fabric Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits A Monte Carlo analysis of a write method used in passive nanoelectronic crossbars
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1