IR-UWB single-chip transceiver for high-band operation compliant to IEEE 802.15.4a

G. Fischer, D. Martynenko, O. Klymenko, S. Olonbayar, D. Kreiser, J. Digel, M. Masini, M. Grozing, R. Kraemer
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引用次数: 9

Abstract

This paper describes a monolithic integrated single-chip transceiver intended for impulse radio (IR) - Ultra-wide Band (UWB) applications compliant to the IEEE 802.15.4a standard. The transceiver operates in the higher UWB band on the mandatory channel #9 (7.9872 GHz). The implemented nominal data rate is 850 kb/sec. The presented chip consists of the entire RF-front-end, 6-bit-resolution successive approximation register (SAR) analogue-to-digital converter (ADC), and the baseband processor running with a clock of 31.2 MHz. The analogue frontend can be further segmented into a pulse generation and transmit part and a quadrature direct down conversion receiver part, whereas both parts share a frequency synthesizer based on an integer-N phase-locked loop (PLL). The impulse generation is based on the gated oscillator principle allowing required on-off keying (OOK) as well as binary phase shift keying (BPSK). While the receiver supports both, coherent and non-coherent impulse detection, here only non-coherent operation will be presented. The baseband processor part contains a separated 499.2 MHz clocked block for transmitter control and provides a serial peripheral interface (SPI) for data exchange with an external micro controller. The presented chip was fabricated in a 0.25 μm SiGe:C BiCMOS technology occupying a Si area of 3.25 - 3.25 mm2.
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IR-UWB单片收发器,用于高频段操作,符合IEEE 802.15.a
本文介绍了一种单片集成单芯片收发器,用于符合IEEE 802.15.a标准的脉冲无线电(IR) -超宽带(UWB)应用。收发器工作在强制信道#9 (7.9872 GHz)的较高UWB频段。实现的标称数据速率为850 kb/秒。该芯片由整个射频前端、6位分辨率逐次逼近寄存器(SAR)模数转换器(ADC)和运行时钟为31.2 MHz的基带处理器组成。模拟前端可以进一步分割为脉冲产生和发射部分和正交直接下变频接收器部分,而这两个部分共享一个基于整数n锁相环(PLL)的频率合成器。脉冲产生基于门控振荡器原理,允许所需的开关键控(OOK)以及二进制相移键控(BPSK)。虽然接收机同时支持相干和非相干脉冲检测,但这里只介绍非相干操作。基带处理器部分包含一个分离的499.2 MHz时钟块,用于发射器控制,并提供一个串行外设接口(SPI),用于与外部微控制器进行数据交换。该芯片采用0.25 μm SiGe:C BiCMOS工艺,Si面积为3.25 ~ 3.25 mm2。
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