A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks

J. Elwell, Ryan D. Riley, N. Abu-Ghazaleh, D. Ponomarev
{"title":"A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks","authors":"J. Elwell, Ryan D. Riley, N. Abu-Ghazaleh, D. Ponomarev","doi":"10.1109/HPCA.2014.6835931","DOIUrl":null,"url":null,"abstract":"Protecting modern computer systems and complex software stacks against the growing range of possible attacks is becoming increasingly difficult. The architecture of modern commodity systems allows attackers to subvert privileged system software often using a single exploit. Once the system is compromised, inclusive permissions used by current architectures and operating systems easily allow a compromised high-privileged software layer to perform arbitrary malicious activities, even on behalf of other software layers. This paper presents a hardware-supported page permission scheme for the physical pages that is based on the concept of non-inclusive sets of memory permissions for different layers of system software such as hypervisors, operating systems, and user-level applications. Instead of viewing privilege levels as an ordered hierarchy with each successive level being more privileged, we view them as distinct levels each with its own set of permissions. Such a permission mechanism, implemented as part of a processor architecture, provides a common framework for defending against a range of recent attacks. We demonstrate that such a protection can be achieved with negligible performance overhead, low hardware complexity and minimal changes to the commodity OS and hypervisor code.","PeriodicalId":164587,"journal":{"name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","volume":"247 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCA.2014.6835931","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Protecting modern computer systems and complex software stacks against the growing range of possible attacks is becoming increasingly difficult. The architecture of modern commodity systems allows attackers to subvert privileged system software often using a single exploit. Once the system is compromised, inclusive permissions used by current architectures and operating systems easily allow a compromised high-privileged software layer to perform arbitrary malicious activities, even on behalf of other software layers. This paper presents a hardware-supported page permission scheme for the physical pages that is based on the concept of non-inclusive sets of memory permissions for different layers of system software such as hypervisors, operating systems, and user-level applications. Instead of viewing privilege levels as an ordered hierarchy with each successive level being more privileged, we view them as distinct levels each with its own set of permissions. Such a permission mechanism, implemented as part of a processor architecture, provides a common framework for defending against a range of recent attacks. We demonstrate that such a protection can be achieved with negligible performance overhead, low hardware complexity and minimal changes to the commodity OS and hypervisor code.
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非包容性内存权限架构,用于防止跨层攻击
保护现代计算机系统和复杂的软件栈免受越来越多可能的攻击变得越来越困难。现代商品系统的架构允许攻击者通常使用一个漏洞来破坏特权系统软件。一旦系统遭到破坏,当前体系结构和操作系统使用的包容性权限很容易允许被破坏的高特权软件层执行任意恶意活动,甚至代表其他软件层。本文提出了一种硬件支持的物理页面权限方案,该方案基于不同系统软件层(如管理程序、操作系统和用户级应用程序)的非包容性内存权限集的概念。我们不是将特权级别视为一个有序的层次结构,每个级别的特权都更高,而是将它们视为不同的级别,每个级别都有自己的一组权限。这种权限机制作为处理器体系结构的一部分实现,为防御最近的一系列攻击提供了一个通用框架。我们证明,这种保护可以通过忽略性能开销、低硬件复杂性和对商用操作系统和管理程序代码的最小更改来实现。
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