MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments

Abstract

In this work, MOS current mode logic (MCML) is analyzed for application to low power, mixed signal environments. A small MCML cell library is developed and optimized for several different performance requirements. The cells are then applied to the generation of pipelined CORDIC structures and compared with equivalent CMOS circuits. MCML CORDICs are designed which can operate from 125 MHz to 310 MHz with power consumption varying between 4.3 mW and 18.6 mW. These power results are up to 1.5 times less than CMOS CORDICs with equivalent propagation delays. Design was done in a 0.25 /spl mu/m standard CMOS process from ST Microelectronics.