An Error Correction Method for Binary and Multiple-Valued Logic

Abstract

This paper presents a method and circuit for correcting faults in logic systems. The method, called "restorative feedback" (RFB), is similar in some respects to triple modular redundancy (TMR), but has an improved error probability with respect to transient errors. Simulation results indicate an improvement by about two orders of magnitude compared to traditional TMR. CMOS circuits are presented for implementing restorative feedback. For binary logic, a dynamic CMOS circuit is considered. For multiple-valued logic, a semi-floating gate implementation is presented.