A design method for an improved soft core of ARMv4 instruction set based on FPGA

Abstract

The commercial embedded microprocessor requires to be authorized, which increases the cost of the chip. The free embedded microprocessor soft-core is of poor portability, which causes difficulty on system design. In order to solve the above problems, this paper introduces an improved IP core base on ARMv4 instruction set. With an independent architecture, the IP core possesses good portability and compatibility. Firstly, hardware multiplier is used to solve the problem of the delay of multiplier, which can raise the speed of arithmetic. Secondly, taking the place of the three-stage instruction pipeline, a five-stage instruction pipeline is used to solve the problem of low efficiency. Finally, the whole core is implemented on FPGA, the utilization of resource is increased with resource sharing technique. The experiment results show that the ARMv4 instruction set can run correctly on the embedded microprocessor described in this paper. Compared with the similar ARMv4 microprocessor, it not only contains the advantage of high performance and open interface, but also is easy to design. The embedded microprocessor can be used in both the SOC system and the FPGA embedded system.