SoC-Mobinet: broadband transceiver design challenges

Abstract

Summary form only given. Decreasing feature size and increasing system complexity enables to map complex systems onto one die (SoC - system on chip) or into one package (SiP - system in package). This reduces development, production and packaging costs of the integrated circuit, increases integration density of the customer products by consuming less board space and optimizes the bill of material by reducing the number of external components. This paper looks at the design challenges posed by broadband transceiver design, including hardware/software reuse, validation and verification effort, and platform design, using the context of the SoC-Mobinet research project.